X86 Instruction Set Architecture Tom Shanley
Shanley, MindShare, Inc) For many modern commercial workloads where the instruction working set. PCI Express Architecture and Protocol Brief Overview A set of.
When you look at the binary 48 c7 c0 01 00 00 00 you need to disassemble it in order to understand its meaning. The algorithm for disassembling is not difficult, but it's complex. It supposes looking up multiple tables. The Algorithm is described in the 2nd volume of Intel Developer Manual, Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2 (2A, 2B & 2C): Instruction Set Reference, A-Z You start reading from the chapter called INSTRUCTION FORMAT. Or, there are good books which dedicate whole chapters on this topic, such as X86 Instruction Set Architecture, Mindshare, by Tom Shanley. A whole chapter is dedicated to disassembling binary X86. Or you can start reading the general algorithm from a manual for the same language made by AMD: AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions Here, in the chapter Instruction Encoding you will find the automaton that defines this language of instructions, and from this graphical scheme you can write easily the decoder.
After you do this you can come back to the Intel Manual, 2nd volume, and use it as a reference book. I also found useful the from. This site is created by a Phd student from CMU, most of it is't well done, but it requires longer time to study and apply it.
After you understand the basic ideas you can look over a free project that implements the algorithm. I found useful the project. At the beginning it is important not to look at abstract projects (like qemu or objdump), which try to implement dissasemblers for many languages in the same code as you will get lost.
Microarchitecture
Distorm focuses only on x86 and implements it correctly and exhaustively. It conveys in formal language the definition of X86 language, while the Intel and AMD manuals define X86 language by using natural language. Other project that works well is.
The Instruction Set, or ISA, is defined as that part of the processor architecture related to, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external IO. With the exception of some small deviations and differences in terminology, all and x86 processors share a common ISA.
This book focuses on those shared attributes (it does not cover those areas where the two companies have chosen widely divergent solutions which, by definition, fall outside of the ISA specification). If you re looking for a comprehensive book designed to bootstrap you up quickly on virtually all aspects of the x86 32/64-bit Instruction Set Architecture (ISA), we respectfully ask you to consider this book.